(1) Field of the Invention
This invention relates to a read only memory (ROM) type semiconductor device and in particular, to an improved process for forming high density self aligned conductive lines (word lines).
(2) Description of the Prior Art
In the quest to achieve microminiaturization of integrated circuit devices, individual elements have been made very small and the elements have been closely packed. As ROM devices are scaled down in dimension, there is a continuous challenge to produce high density conductive lines (i.e., word lines) using a minimum number of process steps. In conventional methods for forming conductive lines, the minimum line pitch is limited by the photolithography precision. The line pitch is the distance between on side of a line and the same side of an adjacent line. This shown in FIG. 1 where pitch 20 illustrates the word line pitch. This minimum line pitch 20 limits the miniaturization of the ROM.
In the conventional prior art process, a thin insulating layer 12, typically oxide is deposited on a monocrystalline silicon substrate 10 as shown in FIG. 1. Subsequently, a conductive layer, often composed of polycrystalline silicon, is deposited on the insulating layer. Next, a photoresist layer is formed on the conductive layer. The photoresist layer is exposed and developed to define a pattern of elongated spaced parallel lines. The exposed conductive layer is etched to form conducting lines 14 (i.e., word lines) and to expose portions of the first insulating layer. Finally, conventional semiconductor techniques are used to form arm complete the non-volatile memory device.